SAMPLE AND HOLD CIRCUITS

摘要

The voltage produced by an input current (i1) is sampled (Si, S2, S3) and stored on the gate (46) of a Fet (Ti). The stored gate voltage allows the FET to function as the reference current source of a current mirror (T2,T3) which generates an output current (i0) proportional to the sampled input current. The current mirror uses dual gate floating gate FETS (T2,T3) whose mirroring ratio can be finely adjusted by adjusting the bias voltages (Vi, V2) applied to their auxiliary gate electrodes (425,435).