| 摘要 |
An apparatus and method for an analog fine delay line, a hybrid delay line, and a delay locked loop (DLL) is described. In the DLL, a coarse phase detector compares a reference signal and feedback signal in controlling coarse phase adjustment signals indicating whether a delay of a coarse delay line should be increased or decreased. Similarly, a fine phase detector compares the reference signal and feedback signal to generate a locking bias signal, which may increase or decrease a delay of an analog fine delay line. The analog fine delay line and coarse delay line may be connected in series creating the hybrid delay line having a total delay comprised of the coarse delay and the fine delay. Additionally, a fine bias generator may control the fine delay in response to an initiating bias signal from an analog phase generator or the locking bias signal. |
