AUTOMATIC ADAPTIVE EQUALIZER IMPLEMENTATION AMENABLE TO MOS

摘要

The present invention is an adaptive equalizer which utilizes a first shift register to store received signal samples and a second shift register to store gain settings. The serial output from the first shift register is parallel multiplied with the gain settings stored in the second register to achieve equalization of a received digital data transmission signal. The gain settings in the second register are updated to automatically equalize by utilizing an incremental control signal which is derived from the system's input signal and the received digital data, using cross-correlation implemented iteratively.