| 摘要 |
A memory interconnection or wiring arrangement which prevents a valid word in the memory from being destroyed by overwriting and also prevents an empty or obsolete memory word from being read out, thereby conserving both time and power. The arrangement involves the employment of one or two additional memory planes or additional bistable storage elements and circuitry which are used to store tag words which indicate whether a forthcoming memory address contains valid or obsolete information. In this arrangement, a tag or status indication signal is written in the additional memory elements to indicate that a word has been written into the current address location. Simultaneously, the state of a second tag or status indicating signal is read or detected to determine whether the forthcoming address location is empty or contains valid information. The detection of this tag during read out is used to determine whether the reading or writing process should continue, stop or search for another address location. The arrangement can be used with core memories, solid state memories, plated wire and thin film memories or any other device in which the interconnection or wiring between the main memory and additional storage and electronic elements can be controlled.
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