发明名称 Trenches to reduce lateral silicide growth in integrated circuit technology
摘要 A method of forming an integrated circuit with a semiconductor substrate is provided. A gate dielectric is formed on the semiconductor substrate, and a gate is formed on the gate dielectric. Source/drain junctions are formed in the semiconductor substrate. A silicide is formed on the source/drain regions and on the gate. Trenches are formed in the semiconductor substrate around the gate. An interlayer dielectric is deposited above the semiconductor substrate, and contacts are then formed to the silicide.
申请公布号 US7023059(B1) 申请公布日期 2006.04.04
申请号 US20040791094 申请日期 2004.03.01
申请人 ADVANCED MICRO DEVICES, INC. 发明人 CHAN DARIN A.;CHAN SIMON SIU-SING;PATTON JEFFREY P.;BERTRAND JACQUES J.
分类号 H01L29/94 主分类号 H01L29/94
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