发明名称 Semiconductor package with wire bond arrangement to reduce cross talk for high speed circuits
摘要 A package for reducing signal cross talk between wire bonds of semiconductor packages. The package includes a semiconductor die having a plurality of bond pads formed thereon. The bond pads arranged in a first subset of bond pads and a second subset of bond pads. The package also includes a substrate having a plurality of contact points, the plurality of contact points are arranged in a first subset of contact points and a second subset of contact points. To reduce signal cross talk, the wire bonds are arranged such that a first subset of wire bonds are electrically coupled between the first subset of bond pads and the first subset of the contact points. The first subset of wire bonds have ball bonds formed on the first subset of bond pads and stitch bonds formed on the first subset of contact points respectively. A second subset of wire bonds are electrically coupled between the second subset of bond pads and the second subset of the contact points. The second subset of wire bonds have stitch bonds formed on the first subset of bond pads and ball bonds formed on the first subset of contact points respectively. The different height profiles of the first set and the second set of wire bonds tends to reduce signal cross talk between the wires.
申请公布号 US2006065983(A1) 申请公布日期 2006.03.30
申请号 US20040956656 申请日期 2004.09.30
申请人 LSI LOGIC CORPORATION 发明人 CHIA CHOK J.;LIEW WEE K.;LIM SENG S.
分类号 H01L23/52 主分类号 H01L23/52
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