One-hot encoded instruction register for boundary scan test compliant devices

摘要

An integrated circuit chip operable in a plurality of Boundary Scan test modes in which at least a part of the circuitry comprised in the integrated circuit chip is tested is provided. The integrated circuit chip comprises a Boundary Scan register and an instruction register. The Boundary Scan register is arranged to perform a test on the tested part of the circuitry by applying a test signal to the tested part of the circuitry and/or storing an output of the tested part of the circuitry in accordance with one of the Boundary Scan test modes. The instruction register is arranged to store a one-hot encoded instruction identifying one of the Boundary Scan test modes. The Boundary Scan register is further arranged to extract which test to perform on the tested part of the circuitry from the one-hot encoded instruction stored in the instruction register. The integrated circuit chip and corresponding methods and hardware devices may benefit from increased test flexibility and reduced time to market.