发明名称 GRADATION DATA GENERATION CIRCUIT AND GRADATION DATA GENERATION METHOD
摘要 PROBLEM TO BE SOLVED: To use a small-scale circuit to suppress flicker when generating gradation data which represents a plurality of gradations by changing a blinking frequency with a plurality of frames as one cycle in a FRC (frame rate control) system. SOLUTION: A gradation data generation circuit includes a frame counter 1 for counting with a display frame period, an X coordinate counter 2 for counting with a display horizontal coordinate period, a Y coordinate counter 3 for counting with a display vertical coordinate period, a frame counter conversion means 4 for converting a frame count value outputted from the frame counter 1 to frame count values different among pixels by a X coordinate count value outputted from the X coordinate counter 2 and a Y coordinate count value outputted from the Y coordinate counter 3, and a display data generation means 5 for outputting the frame count value converted by the frame counter conversion means 4 and multi-value input image data as one-bit display data by bit operation. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006084747(A) 申请公布日期 2006.03.30
申请号 JP20040269076 申请日期 2004.09.16
申请人 NEC ENGINEERING LTD 发明人 UNO SHIGENORI
分类号 G09G3/36;G02F1/133;G09G3/20;G09G5/00;G09G5/10 主分类号 G09G3/36
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