发明名称 Memory
摘要 A memory capable of suppressing disturbance is provided. This memory comprises a bit line, a word line arranged to intersect with the bit line and first storage means connected between the bit line and the word line, and applies prescribed reverse voltages to at least non-selected first storage means connected to a non-selected word line substantially identical times respectively or substantially applies no voltage through a read operation and a rewrite operation.
申请公布号 US2006067139(A1) 申请公布日期 2006.03.30
申请号 US20050281492 申请日期 2005.11.18
申请人 SANYO ELECTRIC CO., LTD. 发明人 SAKAI NAOFUMI;TAKANO YOH
分类号 G11C5/14;G11C7/12;G11C11/22 主分类号 G11C5/14
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