发明名称 Method and system for debugging flow control based designs
摘要 Certain embodiments for debugging mechanism for flow control based designs may comprise a debugging interface module between a transmitter and a receiver, all integrated on a chip. At least one debugging entity, which may be on the chip or off the chip, may indicate to the debugging interface module to initiate debug mode via command signals. In debug mode, the control signals between the transmitter and the receiver may be intercepted by the debugging interface module to halt normal data flow from the transmitter to the receiver. The debugging entity may then transmit data to the receiver, while the transmitter is disabled, or receive data transmitted by the transmitter, while the receiver is disabled. When the debugging entity indicates to the debugging interface module to end debug mode, normal data flow may continue, and the debugging interface module may appear transparent to the data flow.
申请公布号 US2006069954(A1) 申请公布日期 2006.03.30
申请号 US20040981178 申请日期 2004.11.04
申请人 CHEN JIANN-TSUEN;SHIH GUANG-TING 发明人 CHEN JIANN-TSUEN;SHIH GUANG-TING
分类号 G06F11/00 主分类号 G06F11/00
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