| 摘要 |
The disclosure is directed to a system including a first flash memory device having a first interface and a first control interface that includes a first chip enable control input, a second flash memory device having a second interface and a second control interface that includes a second chip enable control input, and a controller that includes a data output and a control signal output. A first portion of the data output is coupled to the first interface. A second portion of the data output is coupled to the second interface. The control signal output includes a chip enable output coupled to both the first chip enable control input and the second chip enable control input. The first flash memory device and the second flash memory device are both configured to concurrently receive input data communicated to the first interface and the second interface from the data output.
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