发明名称 INSTRUCTION SELECTION IN A TWO-PROGRAM COUNTER INSTRUCTION UNIT
摘要 In an instruction handling unit specifically designed for pipeline processing of instructions an apparatus is disclosed which allows the instruction handling unit to process simultaneously computer instructions from two different programs. The apparatus employed for sharing the instruction unit processing capabilities among two programs performs certain checks upon the specific instructions of the two different instruction streams and determines from various machine conditions and variable program conditions which instruction will be executed within the instruction handling unit. The selection algorithm involved is designed to make maximum utilization of the instruction handling unit while preventing any one instruction stream from monopolizing the instruction handling capabilities of the instruction unit.
申请公布号 US3728692(A) 申请公布日期 1973.04.17
申请号 USD3728692 申请日期 1971.08.31
申请人 IBM,US 发明人 FENNEL J,US
分类号 G06F9/38;G06F9/46;(IPC1-7):G06F9/18 主分类号 G06F9/38
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