发明名称 |
Integrated circuit memory devices that support detection of write errors occuring during power failures and methods of operating same |
摘要 |
Integrated circuit devices that support error detection include a non-volatile memory device having a memory array therein containing a plurality of pages of memory cells. A memory controller is also provided. The memory controller is electrically coupled to the non-volatile memory device and is configured to provide the non-volatile memory device with a plurality of segments of page data during a page write operation. The plurality of segments of page data include a plurality of segments of checksum data that identify a number of non-volatile memory cells to be programmed with write data during the page write operation. Additional checksum data is also generated for comparison and error detection purposes during a page read operation.
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申请公布号 |
US2006069851(A1) |
申请公布日期 |
2006.03.30 |
申请号 |
US20040020705 |
申请日期 |
2004.12.22 |
申请人 |
CHUNG HYUN-MO;PARK CHAN-IK |
发明人 |
CHUNG HYUN-MO;PARK CHAN-IK |
分类号 |
G06F13/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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