发明名称 Method and system for ESD protection of balanced circuit board lines
摘要 An array of electrostatic discharge (ESD) devices conforms to the pitch defined by balanced signal lines on a printed wiring board (PWB) so that the array does not unduly affect the design impedance of the balanced lines.
申请公布号 US2006067023(A1) 申请公布日期 2006.03.30
申请号 US20040953840 申请日期 2004.09.29
申请人 SONY ELECTRONICS INC. 发明人 SHINTANI PETER;TAHARA YOSHIHISA
分类号 H02H3/20 主分类号 H02H3/20
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