| 摘要 |
Receive and transmit blocks for asynchronous transfer mode (ATM) cell delineation are disclosed. The receive block has a plurality of cell delineation blocks, a memory controller, a memory and a bus controller. The transmit block has a bus controller, a plurality of queue selection devices, a plurality of memory queues and a plurality of cell delineation blocks. According to one implementation, the bus controllers receive address mode/select signals and operate to respond to one of a plurality of subsets of port addresses on the ATM physical layer responsive to the address mode/select signals.
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