发明名称 Providing an arrangement of memory devices to enable high-speed data access
摘要 A memory subsystem includes multiple memory modules coupled by point-to-point links. A memory controller is coupled by a point-to-point link to a first memory module, which is turn is coupled by another point-to-point link to another memory module. Further memory modules may be coupled by respective point-to-point links in the memory subsystem. In some arrangements, each memory module tracks commands issued to other memory modules, such as more upstream memory modules. Also, in one example implementation, a clock is embedded within a data stream transmitted over a point-to-point link, so that an external clock is not employed in this example implementation.
申请公布号 US7020757(B2) 申请公布日期 2006.03.28
申请号 US20030400371 申请日期 2003.03.27
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 RUHOVETS MICHAEL;WANNER CHRISTOPHER C.
分类号 G06F12/00;G06F13/42;G11C5/00;G11C7/10;G11C7/22;G11C11/4076;G11C11/4093;G11C11/4096 主分类号 G06F12/00
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