Arrangement for ESD protection of an integrated circuit

摘要

To protect a high-frequency integrated circuit ( 1 ) against higher voltages than normal operating voltages on an input/output terminal connected to a bonding pad ( 2 ), a semiconductor varistor ( 3 ) having low and essentially constant resistance for said normal operating voltages and higher resistance for said higher voltages is integrated between the bonding pad ( 2 ) and the input/output terminal together with the integrated circuit ( 1 ).