Semiconductor memory device for preventing skew and timing error of output data

摘要

A semiconductor memory device includes at least memory cell block which has a plurality of memory cells and outputs a plurality of data signals in response to a read command signal; a data latching unit for latching and outputting the plurality of data signals in response to a data output control signal generated in response to the read command signal; a data selection unit for selecting a data output mode from the plurality of data output modes in response to a data selection signal and for outputting data corresponding to the selected data output mode; and a data output control unit for outputting a data selection signal to the data selection unit in response to the data output control signal.