发明名称 Look-up table based logic macro-cells
摘要 A programmable look up table (LUT) circuit for an integrated circuit, comprising: one or more secondary inputs; and one or more configurable logic states; and two or more LUT values; and a programmable means to select a LUT value from a secondary input or a configurable logic state. A programmable macro look up table (macro-LUT) circuit for an integrated circuit, comprising: a plurality of LUT circuits, each of said LUT circuits comprising a LUT output, at least one LUT input, and at least two LUT values; and a programmable means of selecting LUT inputs to at least one of said LUT circuits from one or more other LUT circuit outputs and external inputs, and selecting LUT values to at least one of said LUT circuits from one or more other LUT circuit outputs and configurable logic states, said programmable means further comprised of two selectable manufacturing configurations, wherein: in a first selectable configuration, a random access memory circuit (RAM) is formed, said memory circuit further comprising configurable thin-film memory elements; in a second selectable configuration, a hard-wire read only memory circuit (ROM) is formed in lieu of said RAM, said ROM duplicating one RAM pattern in the first selectable option.
申请公布号 US7019557(B2) 申请公布日期 2006.03.28
申请号 US20030743894 申请日期 2003.12.24
申请人 VICICIV TECHNOLOGY 发明人 MADURAWE RAMINDA UDAYA
分类号 H03K19/177;H03K19/173 主分类号 H03K19/177
代理机构 代理人
主权项
地址