| 摘要 |
An integrated circuit, and method of forming thereof, comprising CVD photoresist (e.g., PPMS 202) is formed on a substrate (e.g., silicon 200), patterned and converted into silicon oxide, and is left on the substrate to function as a silicon oxide layer (e.g., PPMSO 204). A high quality cap layer (e.g., PECVD silicon oxide 212) may then be formed over the lower quality silicon oxide layer utilizing a maskless etch process. A high quality silicon oxide layer (e.g. silicon oxide 308) may be formed on the substrate prior to formation of the CVD photoresist layer to provide a buffer underneath the lower quality silicon oxide. Because etch selectivity is generally not required for the photoresist layer, a thinner photoresist may be used than that of prior art techniques, permitting a larger lithographic process window, increased depth of focus, and a more robust process. |
