发明名称 Elevator controller
摘要 Signals sent from detectors through input units are inputted to respective microcomputers. Microcomputers are synchronized with each other by an external clock, and execute input processing and arithmetic operation processing. In addition, a common memory is connected to each of the microcomputers, which read out/write data from/to the common memory through respective buses. In such a manner, each of the microcomputers adopts a simple hardware configuration having the external clock and the common memory which are common to the microcomputers.
申请公布号 US2006060427(A1) 申请公布日期 2006.03.23
申请号 US20050526433 申请日期 2005.03.03
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 CHIDA AKIHIRO
分类号 B66B1/28;B66B1/34;B66B5/00 主分类号 B66B1/28
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