发明名称 Processing unit having multioperand decimal addition
摘要 A multi-operand decimal adder is described that performs addition on multiple binary coded decimal (BCD) operands. The multi-operand decimal adder uses binary carry-save adders to produce intermediate sums and carries, and outputs a decimal result based on the intermediate sums and carries. In various configurations, the multi-operand decimal adder may perform speculative or non-speculative binary carry-save addition. The multioperand decimal adders achieve a reasonable critical path. As a result, the decimal adders and the techniques described herein may be especially suited for numerically intensive commercial applications, such as spreadsheet or financial applications where large amounts of decimal data typically need to be processed quickly.
申请公布号 US2006064455(A1) 申请公布日期 2006.03.23
申请号 US20040014674 申请日期 2004.12.16
申请人 SCHULTE MICHAEL J;KENNEY ROBERT D 发明人 SCHULTE MICHAEL J.;KENNEY ROBERT D.
分类号 G06F7/50 主分类号 G06F7/50
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