发明名称 Method of fabricating dual damascene interconnections of microelectronic device using diffusion barrier layer against base material
摘要 Methods of fabricating dual damascene interconnections suitable for use in microelectronic devices and similar applications using a diffusion barrier layer to protect against base materials during processing are provided. The methods include the steps of: filling a via with a hydrogen silsesquioxane (HSQ)-based filler as expressed by the general chemical formula: (RSiO<SUB>3/2</SUB>)x(HSiO<SUB>3/2</SUB>)y, wherein x and y satisfy the relationships x+y=1 and 0<x<y<1, and R is selected from C4-C24 alkyl, C4-C24 alkenyl, C4-C24 alkoxy, C8-C24 alkenoxy, substituted C4-C24 hydrocarbon, non-substituted C1-C4 hydrocarbon or substituted C1-C4 hydrocarbon; and, partially etching the filler filling the via and an interlayer dielectric to form a trench, which is connected to the via in the region where the dual damascene interconnections are to be formed. Then, the filler remaining in the via is removed, and the trench and the via are filled with an interconnection material to complete the dual damascene interconnections.
申请公布号 US2006063376(A1) 申请公布日期 2006.03.23
申请号 US20050195404 申请日期 2005.08.02
申请人 LEE KYOUNG-WOO;MAENG JAE-YEOL;KIM JAE-HAK;OH IL-WHAN;SHIN HONG-JAE 发明人 LEE KYOUNG-WOO;MAENG JAE-YEOL;KIM JAE-HAK;OH IL-WHAN;SHIN HONG-JAE
分类号 H01L21/4763;H01L21/31 主分类号 H01L21/4763
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