| 摘要 |
PROBLEM TO BE SOLVED: To decrease the number of signal lines for a control signal supplied to a display module by decreasing the number of signal lines for supplying a synchronizing signal relating to the vertical synchronization timing and horizontal synchronization timing of the control signal. SOLUTION: A composite synchronizing signal generating circuit 21 of an RGB decoder 20 generates and outputs a composite synchronizing signal s1 having a 1st pulse corresponding to only a horizontal synchronizing signal, and a 2nd pulse which corresponds to the horizontal synchronizing signal and a vertical synchronizing signal and has a different waveform from the 1st pulse. A synchronizing signal processing circuit part 31 of an LCD controller 30 outputs the composite synchronizing signal s1 as an internal horizontal synchronizing signal H1, generates and outputs an internal vertical synchronizing signal when detecting a pulse of the composite synchronizing signal s1 is the 2nd pulse, and applies a scanning signal voltage to respective scanning lines of the liquid crystal panel 10 on the basis of the internal vertical synchronizing signal V1, and a display signal voltage to a plurality of signal lines on the basis of the internal horizontal synchronizing signal H1. COPYRIGHT: (C)2006,JPO&NCIPI
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