发明名称 METHOD AND SYSTEM OF SEMICONDUCTOR FABRICATION FAULT ANALYSIS
摘要 A system and method for semiconductor fabrication fault analysis. The storage device stores test records. The program module receives a study lot identity, acquires suspect fabrication issues corresponding to the study lot identity, acquires a number of comparative wafer lot identities processed by the same fabrication tool and fabrication recipe for each fabrication issue, defines the comparative wafer lot identities having the same failed cluster groups as similar failed lot identities, calculates a similarity score for each similar failed lot identity, calculates a causal score according to the similarity scores for each suspect fabrication issue, and arranges the suspect fabrication issues according to causal scores thereof.
申请公布号 US2006064271(A1) 申请公布日期 2006.03.23
申请号 US20040947090 申请日期 2004.09.22
申请人 LIANG SHIH-TSUNG;TAI HSIN-CHIH 发明人 LIANG SHIH-TSUNG;TAI HSIN-CHIH
分类号 G06F19/00 主分类号 G06F19/00
代理机构 代理人
主权项
地址