发明名称 High-speed differential logic multiplexer
摘要 A circuit for a high speed digital multiplexer has an active load circuit connected to an output of the digital multiplexer. The active load circuit loads the multiplexer output with a transimpedance stage with low input resistance to reduce the RC time constant at the multiplexer output. The active load circuit may be based on two active devices connected to the multiplexer output so as to form a differential cascode circuit.
申请公布号 US2006061390(A1) 申请公布日期 2006.03.23
申请号 US20040945144 申请日期 2004.09.20
申请人 TAM KIMO Y 发明人 TAM KIMO Y.
分类号 H03K19/082 主分类号 H03K19/082
代理机构 代理人
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