发明名称 MUTING CIRCUIT AND SIGNAL OUTPUT DEVICE THEREWITH
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a muting circuit with a simple circuit structure for muting various kinds of noises generated at a signal output line surely, and to provide a signal output device with the muting circuit. <P>SOLUTION: A resistor R1 and a capacitor C1 are connected in series with the signal output line of an analog signal generated from a D/A converter 40, and a prescribed voltage Vc is applied. The voltage Vc is set at a level higher than a reference voltage VO fed to the signal output line. If a noise caused by a variation in voltage with polarity reverse to the reference voltage VO is generated in the signal output line, the variation is canceled by discharging the capacitor C1. If the noise caused by a variation in voltage is generated with the same polarity, the resistance of the resistor R1 is so set that the variation in voltage is absorbed. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006080926(A) 申请公布日期 2006.03.23
申请号 JP20040263100 申请日期 2004.09.09
申请人 ORION DENKI KK 发明人 TSUBOKAWA YUKIO
分类号 H03M1/08;G11B20/02 主分类号 H03M1/08
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