发明名称 CIPHER CIRCUIT AND INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a cipher circuit and an integrated circuit in which security can be strengthened by packaging a means against differential power analysis inside the cipher circuit in comparison with a case where the means against the differential power analysis is packaged outside the cipher circuit, and hardware costs required for opposing to the differential power analysis can be suppressed in comparison with a case where drastic measures are taken for a cipher algorithm packaged in the cipher circuit. SOLUTION: Partial key operation is performed on a private key repeatedly 16 times to produce partial keys K1-K16. The partial keys K1-K16 and a plain sentence 2B are inputted and round operation is repeated 16 times to encipher the plain sentence 2B. In such a case, a signal resulting from any D-th round operation and the partial keys are inputted and dummy operation is carried out D times. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006081059(A) 申请公布日期 2006.03.23
申请号 JP20040265048 申请日期 2004.09.13
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SATO TOMOYA;SHIOMI KENTARO;NEMOTO YUSUKE;TORISAKI TADAYUKI;SHIMIZU KAZUYA
分类号 H04L9/10;G09C1/00 主分类号 H04L9/10
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