发明名称 MANUFACTURING METHOD OF MISFET
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method of an MISFET having high current driving ability and low power consumption in the MISFET provided with a gate electrode of damascene structure. SOLUTION: Source/drain diffusion layers (14, 15) are formed on the surfaces of a silicon substrate 1, and a silicide layer 17 is formed on the surface thereof. Then, an interface layer 21 is formed on the silicon substrate 1 at the bottom of a gate opening groove 20 partitioned by gate side walls (12, 13) at a temperature≤550°C, a High-k film 22 is deposited to cover the interface layer 21 and an interlayer insulating film 19 in the gate opening groove 20, and a heat treatment is carried out at a temperature≤550°C. Then, after a conductor film 23 and a metal film 24 covering the whole surface are formed, unnecessary portion on the interlayer insulating film 19 is polished and removed by CMP method to form the MISFET provided with the metal gate electrode of damascene structure. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006080354(A) 申请公布日期 2006.03.23
申请号 JP20040263783 申请日期 2004.09.10
申请人 TOSHIBA CORP 发明人 AKASAKA YASUSHI;MIYAGAWA KAZUHIRO;SASAKI TAKAOKI
分类号 H01L29/78;H01L21/28;H01L21/336;H01L21/8238;H01L27/092;H01L29/423;H01L29/49 主分类号 H01L29/78
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