| 摘要 |
PURPOSE:To modulate and demodulate an analog waveform with fidelity by realizing circuit constitution that enables DELTA-amount center movement by exercising arithmetic control over an increase or decrease in DELTA amount in accordance with the signal state of the analog signal waveform. CONSTITUTION:When a signal EXD which indicates an increase or decrease in DELTA amount has logic 1, a clocked inverter I2 operates to apply the high-order digit bit data DELTA6-DELTA12 of a DELTA-amount register to the low-order digit bit input terminals B1-B7 of an adder 21. Further, signals with logic 1 are inputted to the carry input terminal C1 and terminals B8-B12 of an adder 21. When the signal EXD has logic 0, the data DELTA7-DELTA12 in a register 20 are applied to the terminals B1-B6 of the adder through a clock inverter I1. Further, signals with logic 0 are supplied to the terminals B8-B12, and B7. Consequently, arithmetic is per- formed. As a result, the amplitude center position of the DELTA amount moves to a small value to obtain DELTA-amount arithmetic characteristics suitable to small analog signal amplitude during modulation and demodulation. |
