发明名称 BIT STEALING CONTROLLING SYSTEM FOR DIGITAL EXCHANGE
摘要 PURPOSE:To prevent the degradation of the S/N ratio and the lowering of the bit rate, by transmitting bit stealing information of transmission lines to corresponding terminals and recognizing bit stealing information periodically to discriminate the number of effective bits of voice or data. CONSTITUTION:Data in the PCM24 channel system are transmitted through digital transmission lines 110-1n0, and 1/6 bit steal is performed. Transmission interface 111-1n1 extract fundamental frequency clocks, detect synchronizing patterns, monitor and adjust frame phases, etc. and transmit call signals to input terminals 112-1n2 of a time devision switch 300 and transmit bit stealing in formation of transmission lines 110-1n0 to input terminals 113-1n3. For example, when a channel 312 and an exchange route 313 are set, stealing information is transmitted to a bit stealing controller 214 through the route 113-313-213, and a voice decoder or terminal interface 211 detects the number of effective bits of the call signal by the indicating of the controller 214 and performs a corresponding operation.
申请公布号 JPS587993(A) 申请公布日期 1983.01.17
申请号 JP19810106063 申请日期 1981.07.06
申请人 NIPPON DENKI KK 发明人 SATODA MITSUHIRO
分类号 H04J3/00;H04J3/07;H04Q11/04 主分类号 H04J3/00
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