发明名称 Fabrication of silicon-on-nothing (SON) MOSFET fabrication using selective etching of Si1-xGex layer
摘要 A method for fabrication of silicon-on-nothing (SON) MOSFET using selective etching of Si<SUB>1-x</SUB>Ge<SUB>x </SUB>layer, includes preparing a silicon substrate; growing an epitaxial Si<SUB>1-x</SUB>Ge<SUB>x </SUB>layer on the silicon substrate; growing an epitaxial thin top silicon layer on the epitaxial Si<SUB>1-x</SUB>Ge<SUB>x </SUB>layer; trench etching of the top silicon and Si<SUB>1-x</SUB>Ge<SUB>x</SUB>, into the silicon substrate to form a first trench; selectively etching the Si<SUB>1-x</SUB>Ge<SUB>x </SUB>layer to remove substantially all of the Si<SUB>1-x</SUB>Ge<SUB>x </SUB>to form an air gap; depositing a layer of SiO<SUB>2 </SUB>by CVD to fill the first trench; trench etching to from a second trench; selectively etching the remaining Si<SUB>1-x</SUB>Ge<SUB>x </SUB>layer; depositing a second layer of SiO<SUB>2 </SUB>by CVD to fill the second trench, thereby decoupling a source, a drain and a channel from the substrate; and completing the structure by state-of-the-art CMOS fabrication techniques.
申请公布号 US7015147(B2) 申请公布日期 2006.03.21
申请号 US20030625065 申请日期 2003.07.22
申请人 SHARP LABORATORIES OF AMERICA, INC. 发明人 LEE JONG-JAN;HSU SHENG TENG
分类号 H01L21/302;H01L21/764;H01L21/336;H01L21/762;H01L21/84;H01L27/08;H01L27/12;H01L29/786 主分类号 H01L21/302
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