发明名称 |
Dual damascene structure formed of low-k dielectric materials |
摘要 |
A method for forming a dual damascene interconnect structure provides an intermetal dielectric that includes a spin-on low-k dielectric material formed over a CVD low-k dielectric material. A via opening is formed by etching through the spin-on low-k dielectric material and the CVD low-k dielectric material and a plug material is introduced to fill the via opening. A highly selective trench etching operation etches a trench in the upper, spin-on low-k dielectric material and removes the plug material from the via without attacking the lower CVD low-k dielectric material to form the dual damascene opening which is then filled with a conductive interconnect material. The intermetal dielectric formed of multiple low-k dielectric layers provides advantageous electrical and mechanical properties.
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申请公布号 |
US7015133(B2) |
申请公布日期 |
2006.03.21 |
申请号 |
US20040824132 |
申请日期 |
2004.04.14 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY |
发明人 |
SU YI-NIEN;SHIEH JYU-HORNG |
分类号 |
H01L21/4763;H01L21/44;H01L21/768;H01L23/532 |
主分类号 |
H01L21/4763 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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