发明名称 Packet-based clock signal
摘要 In general, in one aspect, the disclosure describes a method for use in packet processing. The method can include receiving at least a portion of at least one packet and, based on the at least a portion of the at least one packet, determining a clock signal to provide to processing logic that processes the at least one packet.
申请公布号 US7016354(B2) 申请公布日期 2006.03.21
申请号 US20020234489 申请日期 2002.09.03
申请人 INTEL CORPORATION 发明人 VANGAL SRIRAM R.;HOSKOTE YATIN;BORKAR NITIN Y.;XU JIANPING;ERRAGUNTLA VASANTHA K.;BORKAR SHEKHAR Y.
分类号 H04L12/56;H04J3/06;H04L29/06 主分类号 H04L12/56
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