发明名称 Method and apparatus for fault-tolerance via dual thread crosschecking
摘要 A method (and structure) of concurrent fault crosschecking in a computer having a plurality of simultaneous multithreading (SMT) processors, each SMT processor simultaneously processing a plurality of threads, includes processing a first foreground thread and a first background thread on a first SMT processor and processing a second foreground thread and a second background thread on a second SMT processor. The first background thread executes a check on the second foreground thread and the second background thread executes a check on the first foreground thread, thereby achieving a crosschecking of the execution of the threads on the processors.
申请公布号 US7017073(B2) 申请公布日期 2006.03.21
申请号 US20020083579 申请日期 2002.02.27
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 NAIR RAVI;SMITH JAMES E.
分类号 G06F11/00;G06F11/30 主分类号 G06F11/00
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