发明名称 Method for stress reduction in flip chip bump during flip chip mounting and underfill process steps of making a microelectronic assembly
摘要 A method of making a microelectronic assembly buying restraining a substrate in a fixture at room temperature, placing a flip chip on the substrate so that conductive bumps on the flip chip are aligned with contact pads on the substrate, heating the flip chip, the substrate and the fixture to reflow the conductive bumps on the flip chip, cooling the flip chip, substrate and fixture to solidify the conductive bumps and to mount the flip chip to the substrate, depositing an underfill between the flip chip and the substrate, curing the underfill by heating the flip chip, substrate, underfill and fixture to an elevated temperature, and removing the flip chip mounted substrate from the fixture.
申请公布号 US7015066(B2) 申请公布日期 2006.03.21
申请号 US20010946995 申请日期 2001.09.05
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 TSAO PEI-HAW;HUANG CHENDER;WANG JONES;CHEN KEN
分类号 H01L21/44;H01L21/00;H01L21/48;H01L21/50;H01L21/56;H01L21/60;H01L21/64;H01L23/498 主分类号 H01L21/44
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