发明名称 Method for manufacturing semiconductor device
摘要 The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance element. The present invention is directed to the manufacturing method of a semiconductor device in which respective semiconductor layers which become a sub collector layer, a collector layer, a base layer, a wide gap emitter layer and an emitter layer are sequentially formed over one surface of a semiconductor substrate and, thereafter, respective semiconductor layers are processed to form the hetero junction bipolar transistor, the Schottky diode and the resistance element in a monolithic manner. An emitter electrode of the hetero junction bipolar transistor, a Schottky electrode of the Schottky diode and a resistance film of the resistance element are simultaneously formed using a same material (for example, WSiN). Accordingly, the man-hours can be reduced and the manufacturing cost of the semiconductor device can be reduced.
申请公布号 US2006057789(A1) 申请公布日期 2006.03.16
申请号 US20050266259 申请日期 2005.11.04
申请人 发明人 KUROKAWA ATSUSHI;KITAHARA TOSHIAKI;INAGAWA HIROSHI;IMAMURA YOSHINORI
分类号 H01L21/338 主分类号 H01L21/338
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