发明名称 |
Memory device having open bit line cell structure using burn-in testing scheme and method therefor |
摘要 |
A memory device having an open bit line cell structure uses a wafer burn-in testing scheme and a method for testing the same. The memory device includes a sense amplifier having first and second input terminals; a bit line connected to the first input terminal of the sense amplifier and extended in a first direction; an inverted bit line connected to the second input terminal of the sense amplifier and extended in a second direction; and a voltage supply means for applying the same voltage to the bit line and the inverted bit line in a precharge operation mode and applying a different level voltage to the bit line and the inverted bit line in a burn-in test operation mode. It is possible to efficiently screen defects of memory cells and between bit lines by performing a wafer burn-in test using a wafer burn-in scheme on a memory device having an open bit line cell structure.
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申请公布号 |
US2006056252(A1) |
申请公布日期 |
2006.03.16 |
申请号 |
US20050223321 |
申请日期 |
2005.09.08 |
申请人 |
PARK KI-WON;MOON BYUNG-SIK |
发明人 |
PARK KI-WON;MOON BYUNG-SIK |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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地址 |
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