发明名称 Method for designing semiconductor device and semiconductor device
摘要 A method for designing a semiconductor device and a semiconductor device of the present invention permits the achievement of a predetermined pattern area ratio while power supply lines are reinforced by connecting a dummy metal line, which is formed in an unoccupied region of a wiring layer for the purpose of achieving the predetermined area ratio, at its two or more points with a power supply line for VDD or VSS.
申请公布号 US2006056219(A1) 申请公布日期 2006.03.16
申请号 US20050222789 申请日期 2005.09.12
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 ARAKI TAKAYUKI;KIMURA FUMIHIRO;SHIMADA JUNICHI;FUJITA KAZUHISA
分类号 G11C5/06 主分类号 G11C5/06
代理机构 代理人
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