| 摘要 |
PROBLEM TO BE SOLVED: To evade the occurrence of a data error due to dependency and to execute a plurality of instructions in a parallel mode in an out-of-order fashion. SOLUTION: A computer system includes an instruction fetch unit and an execution unit for executing the instructions out-of-order. The execution unit includes: a register file (250); a plurality of functional units (260, 262); first buses (254, 225) for transferring data from the register file to the plurality of functional units; second buses (275, 276) for transferring the data from the plurality of functional units to the register file; and a load store unit (205) adapted to make load requests to a memory system out-of-order for all the instructions in an instruction window and store requests in-order for all the instructions in the instruction window. COPYRIGHT: (C)2006,JPO&NCIPI
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