| 摘要 |
A PMOS transistor has its source connected to a first node at which the voltage level varies from VDD to 2VDD and its drain connected to the drain of each of cross-connected NMOS transistors at a second node. The NMOS transistors have their sources connected to one ends of capacitive elements charged up to 2VDD, respectively. The cross-connected NMOS transistors keeps the voltage at the second node at a constant value (2VDD) regardless of signals input to the other ends of the capacitive elements, respectively. The PMOS transistor can be turned off by applying a voltage of 2VDD to the gate. Consequently, the PMOS transistor has a maximum reverse voltage (gate-to-source voltage in the off state) of VDD.
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