发明名称 |
METHOD AND SYSTEM FOR OPTIMIZING DMA CHANNEL SELECTION |
摘要 |
A host bus adapter coupled to a network and a host computing system is provided. The host bus adapter includes a direct memory access ("DMA") mode detection module that receives a DMA channel identifier information from an arbitration module that receives requests from plural DMA channels, wherein the DMA mode detection module includes a DMA counter that counts a number of times a single DMA channel is exclusively serviced by the arbitration module and if the DMA counter value is equal to a threshold value, then the DNA mode detection module enables a single channel mode during which standard transaction rules are ignored for determining DMA request lengths for transferring data. The single channel mode is enabled for a certain duration. The host bus adapter includes a rule based segmentation logic that may be enabled and/or disabled by host bus adapter firmware and/or detection of a single channel mode condition. |
申请公布号 |
WO2006029133(A2) |
申请公布日期 |
2006.03.16 |
申请号 |
WO2005US31661 |
申请日期 |
2005.09.07 |
申请人 |
QLOGIC CORPORATION |
发明人 |
SONKSEN, BRADLEY, S.;CHU, KUANGFU, D.;GANDHI, RAJENDRA, R. |
分类号 |
G06F13/28 |
主分类号 |
G06F13/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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