发明名称 Method, circuit and system for erasing one or more non-volatile memory cells
摘要 The present invention is a method circuit and system for erasing one or more non-volatile memory ("NVM") cells in an NVM array. One or more NVM cells of a memory array may be erased using an erase pulse produced by a controller and/or erase pulse source adapted to induce and/or invoke a substantially stable channel current in the one or more NVM cells during an erasure procedure. The voltage profile of an erase pulse may be predefined or the voltage profile of the erase pulse may be dynamically adjusted based on feedback from a current sensor during an erase procedure
申请公布号 US2006056240(A1) 申请公布日期 2006.03.16
申请号 US20050537857 申请日期 2005.06.07
申请人 SAIFUN SEMICONDUCTORS, LTD. 发明人 SHAPPIR ASSAF;BLOOM ILAN;EITAN BOAZ
分类号 G11C16/04;G11C16/14 主分类号 G11C16/04
代理机构 代理人
主权项
地址