| 摘要 |
<p>An improved differential input amplifier stage used as the input stage in digital differential line receivers or operational amplifiers. The differential input amplifier stage has a pair of input transistors (22, 23) forming a differential pair with a common node (N4) and two complementary output nodes (N3,N3'); a current mirror, coupled to the two complementary output nodes and responsive to a first one of the two complementary output nodes and a single-ended output signal on the second one of the two complementary output nodes; and a current source transistor coupled to the common node (N4) and responsive to the first one (N3') of the two complementary output nodes. The current source transistor maintains the voltage on the first one of the two complementary output nodes substantially constant, thereby improving common mode and power supply noise immunity and providing faster differential response by the differential input amplifier stage.</p> |
