发明名称 MEMORY CHANNEL WITH BIT LANE FAIL-OVER
摘要 Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory device or interface, and a fail-over circuit coupled between the plurality of bit lanes and the memory device or interface.
申请公布号 KR20060023985(A) 申请公布日期 2006.03.15
申请号 KR20057023351 申请日期 2005.12.05
申请人 INTEL CORP. 发明人 VOGT PETE;MORROW WARREN;BRZEZINSKI DENNIS
分类号 G06F13/00;G06F13/16;G11C29/00 主分类号 G06F13/00
代理机构 代理人
主权项
地址