| 摘要 |
A control circuit for processing image data received from an imager, like a CCD, with the circuit providing automatic compensation for those factors usually associated with imaging systems. The imager generates image data for a predetermined number of pixel positions in a scan line at a predetermined rate for a document being moved relative to the scan line. This image data is processed, amplified, and fed (at the predetermined rate) into a flash A/D converter used in the circuit. Offset and gain compensation data are supplied as reference levels to the converter at the predetermined rate to provide offset and gain compensation for each pixel position in the scan line. This ensures predictable post processing performance with regard to binarization, compression, and machine reading plus a consistent and undistorted gray level representation of the imaged document.
|
