| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device which can prevent signal wiring from being affected by adverse effects due to the capacitance. SOLUTION: The semiconductor device includes terminals of a high reference potential (Vdd) and a low reference potential (Vss) which constitute a voltage of power source; a first MOS capacitance (813), where the gate of a p-channel MOSFET is connected with the terminal of the low reference potential, and a source and drain are connected with the terminal of the high reference potential; and first signal wiring (201) which is connected with the gate through a parasitic capacitance (202), and the signal of the low reference potential is supplied, when the power source starts. COPYRIGHT: (C)2006,JPO&NCIPI |
