Pipeline synchronisation device for transferring data between clocked devices having different clock frequencies. The Pipeline synchronisation device comprises a mousetrap buffer for exchanging data with one of said external devices said mousetrap buffer having a signalling output for coordinating the data exchange with the external device. The pipeline synchronisation device comprises further a synchroniser adapted to synchronising the change in a signalling output with the clock of the external device.
申请公布号
WO2004066142(A3)
申请公布日期
2006.03.09
申请号
WO2004IB50024
申请日期
2004.01.14
申请人
KONINKLIJKE PHILIPS ELECTRONICS N.V.;KESSELS, JOZEF, L., W.;PEETERS, ADRIANUS, M., G.;KIM, SUK, J.
发明人
KESSELS, JOZEF, L., W.;PEETERS, ADRIANUS, M., G.;KIM, SUK, J.