发明名称
摘要 PROBLEM TO BE SOLVED: To relieve high step-difference between a memory cell array part and the peripheral circuit part, by forming an interlayer film covering locally a peripheral circuit region, above the peripheral circuit part, after bit lines are formed. SOLUTION: A lower electrode 12 of a charge storage capacitor element which is in contact with a TiN plug 52 is formed on a silicon oxide film 901 of a memory cell array part. Interlayer insulating films 902, 903 are selectively formed on a silicon oxide film 901 in the peripheral circuit part. On the lower electrode 12 of the memory cell array part, a lower electrode 12A of a crown type is formed whose height exceeds the surfaces of the interlayer insulating films 902, 903 covering the peripheral circuit in order to increase capacitor capacitance. On an interlayer insulating film 905 having little step-difference, a plurality of first wirings 5 are patterned and formed which wirings are connected with a plate electrode drawing W plug 605A and a peripheral circuit wiring drawing W plug 605. Thereby the later wiring process is facilitated.
申请公布号 JP3752795(B2) 申请公布日期 2006.03.08
申请号 JP19970248167 申请日期 1997.09.12
申请人 发明人
分类号 H01L27/088;H01L27/108;H01L21/8234;H01L21/8242;H01L27/10 主分类号 H01L27/088
代理机构 代理人
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