| 摘要 |
The method includes the steps of sequentially forming a high concentration of N impurity layer (12) and a P epitaxial layer (13) on a semiconductor substrate (11), etching the layers (12,13) except a device formation area, forming a low concentration of N impurity layer (14) on the layer (13), implanting and heat-treating O2 ions thereinto to form an oxide film (17) at a middle depth portion of both sides of the layer (12), forming a gate insulating film (18) thereon to form a first and second gate electrodes (20,19), and forming a high concentration of P impurity layer (21) into the layer (16), thereby forming a horizontal transistor on a vertical transistor to reduce the chip size.
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